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isolated, single-channel rs-232 line driver/receiver adm3251e rev. e information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2008C2010 analog devices, inc. all rights reserved. features 2.5 kv fully isolated (power and data) rs-232 transceiver iso power integrated, isolated dc-to-dc converter 460 kbps data rate 1 tx and 1 rx meets eia/tia-232e specifications esd protection on r in and t out pins 8 kv: contact discharge 15 kv: air gap discharge 0.1 f charge pump capacitors high common-mode transient immunity: >25 kv/s safety and regulatory approvals ul recognition 2500 v rms for 1 minute per ul 1577 vde certificate of conformity din en 60747-5-2 (vde 0884 teil 2): 2003-01 csa component acceptance notice #5a operating temperature range: ?40c to +85c wide body, 20-lead soic package applications high noise data communications industrial communications general-purpose rs-232 data links industrial/telecommunications diagnostic ports medical equipment functional block diagram 07388-001 decode rect reg v? c4 0.1f 16v voltage doubler c1+ c1? v+ v iso c2+ c2? r t voltage inverter v cc r out t in gnd gnd iso r in * t ou t adm3251e osc encode encode decode *internal 5k ? pull-down resistor on the rs-232 input. 0.1f c3 0.1f 10v c2 0.1f 16v 0.1f c1 0.1f 16v figure 1. general description the adm3251e is a high speed, 2.5 kv fully isolated, single- channel rs-232/v.28 transceiver device that operates from a single 5 v power supply. due to the high esd protection on the r in and t out pins, the device is ideally suited for operation in electrically harsh environments or where rs-232 cables are frequently being plugged and unplugged. the adm3251e incorporates dual-channel digital isolators with iso power? integrated, isolated power. there is no requirement to use a separate isolated dc-to-dc converter. chip-scale trans- former i coupler? technology from analog devices, inc., is used both for the isolation of the logic signals as well as for the inte- grated dc-to-dc converter. the result is a total isolation solution. the adm3251e contains iso power technology that uses high frequency switching elements to transfer power through the transformer. special care must be taken during printed circuit board (pcb) layout to meet em issions standards. refer to application note an-0971, control of radiated emissions with isopower devices , for details on board layout considerations. the adm3251e conforms to the eia/tia- 232e and itu-t v. 28 specifications and operates at data rates up to 460 kbps. four external 0.1 f charge pump capacitors are used for the voltage doubler/inverter, permitting operation from a single 5 v supply. the adm3251e is available in a 20-lead, wide body soic package and is specified over the ?40c to +85c temperature range.
adm3251e rev. e | page 2 of 16 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagram .............................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 package characteristics ............................................................... 5 regulatory information ............................................................... 5 insulation and safety-related specifications ............................ 5 din en 60747-5-2 (vde 0884 teil 2): 2003-01 insulation characteristics .............................................................................. 6 absolute maximum ratings ............................................................ 7 esd caution .................................................................................. 7 pin configuration and function descriptions ............................. 8 typical performance characteristics ............................................. 9 theory of operation ...................................................................... 11 isolation of power and data ...................................................... 11 charge pump voltage converter ............................................. 12 5.0 v logic to eia/tia-232e transmitter .............................. 12 eia/tia-232e to 5 v logic receiver ...................................... 12 high baud rate ........................................................................... 12 thermal analysis ....................................................................... 12 insulation lifetime ..................................................................... 12 applications information .............................................................. 13 pcb layout ................................................................................. 13 example pcb for reduced emi ............................................... 13 isolated power supply circuit .................................................. 14 outline dimensions ....................................................................... 15 ordering guide .......................................................................... 15 revision history 5/10rev. d to rev. e changes to features section............................................................ 1 changes to table 4 ............................................................................ 5 3/10rev. c to rev. d changes to features and general description sections .............. 1 changes to table 4 and table 5 ....................................................... 5 changed din v vde v 0884-10 (vde v 0884-10):2006-12 insulation characteristics (pending) heading to din en 60747-5-2 (vde 0884 teil 2): 2003-01 insulation characteristics ................................................................................... 6 changes to pollution degree and inputCto-output test voltage parameters, table 6 ............................................................. 6 added applications information section and example pcb for reduced emi section .............................................................. 13 added table 9 and table 10; renumbered sequentially ........... 13 changes to pcb layout section ................................................... 13 added isolated power supply circuit section ............................ 14 added figure 22; renumbered sequentially .............................. 14 1/10rev. b to rev. c changes to table 4 ............................................................................ 5 11/09rev. a to rev. b changes to figure 1 ........................................................................... 1 changed to primary side supply input current, i cc(disable) maximum limit to 2.5 ma .............................................................. 4 changes to table 4 ............................................................................. 5 changes to figure 13 ...................................................................... 11 9/08rev. 0 to rev. a changes to timing parameters in table 1 ..................................... 3 changes to timing parameters in table 2 ..................................... 4 changes to ordering guide .......................................................... 14 7/08revision 0: initial version
adm3251e rev. e | page 3 of 16 specifications all voltages are relative to their respective ground; all minimum/maximum specifications apply over the entire recommended oper ating range; t a = 25c and v cc = 5.0 v (dc-to-dc converter enabled), unless otherwise noted. table 1. parameter min typ max unit test conditions/comments dc characteristics v cc operating voltage range 4.5 5.5 v dc-to-dc converter enable threshold, v cc(enable) 1 4.5 v dc-to-dc converter disable threshold, v cc(disable) 1 3.7 v dc-to-dc converter enabled input supply current, i cc(enable) 110 ma v cc = 5.5 v, no load 145 ma v cc = 5.5 v, r l = 3 k v iso output 2 5.0 v i iso = 0 a logic transmitter input, t in logic input current, i tin ?10 +0.01 +10 a logic low input threshold, v tinl 0.3 v cc v logic high input threshold, v tinh 0.7 v cc v receiver output, r out logic high output, v routh v cc ? 0.1 v cc v i routh = ?20 a v cc ? 0.5 v cc ? 0.3 v i routh = ?4 ma logic low output, v routl 0.0 0.1 v i routh = 20 a 0.3 0.4 v i routh = 4 ma rs-232 receiver, r in eia-232 input voltage range 3 ?30 +30 v eia-232 input threshold low 0.6 2.0 v eia-232 input threshold high 2.1 2.4 v eia-232 input hysteresis 0.1 v eia-232 input resistance 3 5 7 k transmitter, t out output voltage swing (rs-232) 5 5.7 v r l = 3 k to gnd transmitter output resistance 300 v iso = 0 v output short-circuit current (rs-232) 12 ma timing characteristics maximum data rate 460 kbps r l = 3 k to 7 k, c l = 50 pf to 1000 pf receiver propagation delay t phl 190 ns t plh 135 ns transmitter propagation delay 650 ns r l = 3 k, c l = 1000 pf transmitter skew 80 ns receiver skew 70 ns transition region slew rate 3 5.5 10 30 v/s +3 v to ?3 v or ?3 v to +3 v, v cc = +3.3 v, r l = 3 k, c l = 1000 pf, t a = 25c ac specifications output rise/fall time, t r /t f (10% to 90%) 2.3 ns c l = 15 pf, cmos signal levels common-mode transient immunity at logic high output 4 25 kv/s v cm = 1 kv, transient magnitude = 800 v common-mode transient immunity at logic low output 4 25 kv/s v cm = 1 kv, transient magnitude = 800 v esd protection (r in and t out pins) 15 kv human body model air discharge 8 kv human body model contact discharge 1 enable/disable threshold is the v cc voltage at which the internal dc-to-dc converter is enabled/disabled. 2 to maintain data sheet specificat ions, do not draw current from v iso . 3 guaranteed by design. 4 v cm is the maximum common-mode voltage slew ra te that can be sustained while maintain ing specification-compliant operation. v cm is the common-mode potential difference between the logic and bus sides. the transient magnitude is the range over which the common mode is slewed. the comm on-mode voltage slew rates apply to both rising and falling common-mode voltage edges.
adm3251e rev. e | page 4 of 16 all voltages are relative to their respective ground; all minimum/maximum specifications apply over the entire recommended oper ating range; t a = 25c, v cc = 3.3 v (dc-to-dc converter disabled), and the secondary side is powered externally by v iso = 3.3 v, unless otherwise noted. table 2. parameter min typ max unit test conditions/comments dc characteristics v cc operating voltage range 3.0 3.7 v dc-to-dc converter disable threshold, v cc(disable) 1 3.7 v dc-to-dc converter disabled v iso 2 3.0 5.5 v primary side supply input current, i cc(disable) 2.5 ma no load secondary side supply input current, i iso(disable) 12 ma v iso = 5.5 v, r l = 3 k secondary side supply input current, i iso(disable) 6.2 ma r l = 3 k logic transmitter input, t in logic input current, i tin ?10 +0.01 +10 a logic low input threshold, v tinl 0.3 v cc v logic high input threshold, v tinh 0.7 v cc v receiver output, r out logic high output, v routh v cc ? 0.1 v cc v i routh = ?20 a v cc ? 0.5 v cc ? 0.3 v i routh = ?4 ma logic low output, v routl 0.0 0.1 v i routh = 20 a 0.3 0.4 v i routh = 4 ma rs-232 receiver, r in eia-232 input voltage range 3 ?30 +30 v eia-232 input threshold low 0.6 1.3 v eia-232 input threshold high 1.6 2.4 v eia-232 input hysteresis 0.3 v eia-232 input resistance 3 5 7 k transmitter, t out output voltage swing (rs-232) 5 5.7 v r l = 3 k to gnd transmitter output resistance 300 v iso = 0 v output short-circuit current (rs-232) 11 ma timing characteristics maximum data rate 460 kbps r l = 3 k to 7 k, c l = 50 pf to 1000 pf receiver propagation delay t phl 190 ns t plh 135 ns transmitter propagation delay 650 ns r l = 3 k, c l = 1000 pf transmitter skew 80 ns receiver skew 55 ns transition region slew rate 3 5.5 10 30 v/s +3 v to ?3 v or ?3 v to +3 v, v cc = 3.3 v, r l = 3 k, c l = 1000 pf, t a = 25c ac specifications output rise/fall time, t r /t f (10% to 90%) 2.3 ns c l = 15 pf, cmos signal levels common-mode transient immunity at logic high output 4 25 kv/s v cm = 1 kv, transient magnitude = 800 v common-mode transient immunity at logic low output 4 25 kv/s v cm = 1 kv, transient magnitude = 800 v esd protection (r in and t out pins) 15 kv human body model air discharge 8 kv human body model contact discharge 1 enable/disable threshold is the v cc voltage at which the internal dc-to-dc converter is enabled/disabled. 2 to maintain data sheet specificat ions, do not draw current from v iso . 3 guaranteed by design. 4 v cm is the maximum common-mode voltage slew ra te that can be sustained while maintain ing specification-compliant operation. v cm is the common-mode potential difference between the logic and bus sides. the transient magnitude is the range over which the common mode is slewed. the comm on-mode voltage slew rates apply to both rising and falling common-mode voltage edges.
adm3251e rev. e | page 5 of 16 package characteristics table 3. parameter symbol min typ max unit test conditions resistance (input-to-output) r i-o 10 12 capacitance (input-to-output) c i-o 2.2 pf f = 1 mhz input capacitance c i 4.0 pf ic junction-to-air thermal resistance ja 47.05 c/w regulatory information table 4. ul 1 vde 2 csa recognized under 1577 component recognition program file e214100 certified according to din en 60747-5-2 (vde 0884 teil 2):2003-01 file 2471900-4880-0001/123328 approved under csa component acceptance notice #5a basic insulation per csa 60950-1-07 and iec 60950-1, 400 v rms (566 v peak) maximum working voltage file 2268268 1 in accordance with ul 1577, each adm3251e is proof-tested by applying an insulation test voltag e 3000 v rms for 1 sec (curren t leakage detection limit = 5 a). 2 each adm3251e is proof tested by applying an insulation test voltage 4000 v peak for 1 sec (partial discharge detection limit = 5 pc). insulation and safety-related specifications table 5. parameter symbol value unit conditions rated dielectric insulation voltage 2500 v rms 1 minute duration minimum external air gap (clearance) l(i01) 7.7 mm measured from input termin als to output terminals, shortest distance through air minimum external tracking (creepage) l(i02) 4.16 mm measured from input termin als to output terminals, shortest distance path along body minimum internal gap (internal clearance) 0.017 mm distance through insulation tracking resistance (comparative tracking index) cti >175 v din iec 112/vde 0303 part 1 isolation group iiia maximum working voltage compatible with 50-year service life v iorm 425 v peak continuous peak voltage across the isolation barrier
adm3251e rev. e | page 6 of 16 din en 60747-5-2 (vde 0884 teil 2): 2003-01 insulation characteristics this isolator is suitable for reinforced isolation only within the safety limit data. maintenance of the safety data is ensured by protective circuits. table 6. description conditions symbol characteristic unit installation classification per din vde 0110 for rated mains voltage 150 v rms i to iv for rated mains voltage 300 v rms i to iii climatic classification 40/105/21 pollution degree 2 maximum working insulation voltage v iorm 424 v peak input-to-output test voltage method b1 v iorm 1.875 = v pr , 100% production test, t m = 1 sec, partial discharge < 5 pc v pr 795 v peak highest allowable overvoltage transient overvoltage, t tr = 10 sec v tr 4000 v peak safety-limiting values maximum value allowed in the event of a failure case temperature t s 150 c supply current i s1 531 ma insulation resistance at t s v io = 500 v r s >10 9
adm3251e rev. e | page 7 of 16 absolute maximum ratings table 7. parameter rating v cc , v iso ?0.3 v to +6 v v+ (v cc ? 0.3 v) to +13 v v? C13 v to +0.3 v input voltages t in ?0.3 v to (v cc + 0.3 v) r in 30 v output voltages t out 15 v r out ?0.3 v to (v cc + 0.3 v) short-circuit duration t out continuous power dissipation ja , thermal impedance 47.05c/w operating temperature range industrial ?40c to +85c storage temperature range ?65c to +150c pb-free temperature (soldering, 30 sec) 260c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution
adm3251e rev. e | page 8 of 16 pin configuration and fu nction descriptions nc 1 v cc 2 v cc 3 gnd 4 v iso 20 v+ 19 c1+ 18 c1? 17 gnd 5 t out 16 gnd 6 r in 15 gnd 7 c2+ 14 r out 8 c2? 13 t in 9 v? 12 gnd 10 gnd iso 11 nc = no connect adm3251e top view (not to scale) 07388-002 figure 2. pin configuration table 8. pin function descriptions pin no. mnemonic description 1 nc no connect. this pin should always remain unconnected. 2, 3 v cc power supply input. a 0.1 f decoupli ng capacitor is required between v cc and ground. when a voltage between 4.5 v and 5.5 v is applied to the v cc pin, the integrated dc-to-dc converter is enabled. if this voltage is lowered to between 3.0 v and 3.7 v, the integrated dc-to-dc converter is disabled. 4, 5, 6, 7, 10 gnd ground. 8 r out receiver output. this pin outputs cmos logic levels. 9 t in transmitter (driver) input. this pin accepts ttl/cmos levels. 11 gnd iso ground reference for isolator primary side. 12 v? internally generated negative supply. 13, 14 c2?, c2+ positive and negative connections for charge pump ca pacitors. external capacitor c2 is connected between these pins; a 0.1 f capacitor is recommended, b ut larger capacitors up to 10 f can be used. 15 r in receiver input. this input accepts rs-232 signal levels. 16 t out transmitter (driver) output. this outputs rs-232 signal levels. 17, 18 c1?, c1+ positive and negative connections for charge pump ca pacitors. external capacitor c1 is connected between these pins; a 0.1 f capacitor is recommended, b ut larger capacitors up to 10 f can be used. 19 v+ internally generated positive supply. 20 v iso isolated supply voltage for isolator secondary side. a 0.1 f decoupling capacitor is required between v iso and ground. when the integrated dc-to-dc converter is enabled, the v iso pin should not be used to power external circuitry. if the integrated dc-to-dc converter is disabled, power the secondary side by applying a voltage in the range of 3.0 v to 5.5 v to this pin.
adm3251e rev. e | page 9 of 16 typical performance characteristics 12 8 4 0 ?4 ?8 ?12 0 200 400 600 800 1000 load capacitance (pf) tx output (v) 07388-004 tx low (v cc = 5v) tx low (v iso = 3.3v) tx high (v cc = 5v) tx high (v iso = 3.3v) figure 3. transmitter output voltage high/low vs. load capacitance at 460 kbps 12 10 8 6 4 2 0 ?2 ?4 ?6 ?8 ?10 4.5 4.7 4.9 5.1 5.3 5.5 v cc (v) tx output (v) 07388-005 tx output high tx output low figure 4. transmitter output voltage high/low vs. v cc , r l = 3 k 12 8 4 0 ?4 ?8 ?12 10 6 2 ?2 ?6 ?10 3.0 3.5 4.0 4.5 5.0 5.5 v iso (v) tx output (v) 07388-009 tx output high tx output low figure 5. transmitter output voltage high/low vs. v iso , r l = 3 k 12 10 8 6 4 2 0 ?2 ?4 ?6 ?8 ?10 ?12 01234 load current (ma) tx output (v) 07388-006 tx output low (v cc = 5v) tx output low (v iso = 3.3v) tx output high (v cc = 5v) tx output high (v iso = 3.3v) figure 6. transmitter output voltage high/low vs. load current 15 10 5 0 ?5 ?10 ?15 0123 load current (ma) v+, v? (v) 07388-007 4 v+ (v cc = 5v) v? (v cc = 5v) v+ (v iso = 3.3v) v? (v iso = 3.3v) figure 7. charge pump v+, v? vs. load current 400 v+ v? 350 300 250 200 150 100 50 0 4.50 4.75 5.00 5.25 5.50 v cc (v) charge pump impedance ( ? ) 07388-008 figure 8. charge pump impedance vs. v cc
adm3251e rev. e | page 10 of 16 400 v? 350 300 250 200 150 100 50 0 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5.25 5.50 v iso (v) charge pump impedance ( ? ) 07388-010 v+ figure 9. charge pump impedance vs. v iso 200 180 160 140 120 100 80 60 40 20 0 0 46 92 138 184 230 276 322 368 414 460 data rate (kbps) supply current (ma) 07388-003 v cc = 4.5v v cc = 5.5v v cc = 5v figure 10. primary supply current vs. data rate 07388-012 5v/div 5v/div time (500ns/div) 2 1 v cc =5v load = 3k ? and 1nf figure 11. 460 kbps data transmission 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 4.50 4.75 5.00 5.25 5.50 v cc (v) t in voltage threshold (v) 07388-011 high threshold low threshold figure 12. t in voltage threshold vs. v cc
adm3251e rev. e | page 11 of 16 theory of operation the adm3251e is a high speed, 2.5 kv fully isolated, single- channel rs-232 transceiver device that operates from a single power supply. the internal circuitry consists of the following main sections: ? isolation of power and data ? a charge pump voltage converter ? a 5.0 v logic to eia/tia-232e transmitter ? a eia/tia-232e to 5.0 v logic receiver 07388-013 decode rect reg v? c4 0.1f 16v voltage doubler c1+ c1? v+ v iso c2+ c2? r t voltage inverter v cc r out t in gnd gnd iso r in * t ou t adm3251e osc encode encode decode *internal 5k ? pull-down resistor on the rs-232 input. 0.1f c3 0.1f 10v c2 0.1f 16v 0.1f c1 0.1f 16v figure 13. functional block diagram isolation of power and data the adm3251e incorporates a dc-to-dc converter section, which works on principles that are common to most modern power supply designs. v cc power is supplied to an oscillating circuit that switches current into a chip-scale air core transformer. power is transferred to the secondary side, where it is rectified to a high dc voltage. the power is then linearly regulated to about 5.0 v and supplied to the secondary side data section and to the v iso pin. the v iso pin should not be used to power external circuitry. because the oscillator runs at a constant high frequency independent of the load, excess power is internally dissipated in the output voltage regulation process. limited space for transformer coils and components also adds to internal power dissipation. this results in low power conversion efficiency. the adm3251e can be operated with the dc-to-dc converter enabled or disabled. the internal dc-to-dc converter state of the adm3251e is controlled by the input v cc voltage. in normal operating mode, v cc is set between 4.5 v and 5.5 v and the internal dc-to-dc converter is enabled. to disable the dc-to-dc converter, lower v cc to a value between 3.0 v and 3.7 v. in this mode, the user must externally supply isolated power to the v iso pin. an isolated secondary side voltage of between 3.0 v and 5.5 v and a secondary side input current, i iso , of 12 ma (maximum) is required on the v iso pin. the signal channels of the adm3251e then continue to operate normally. the t in pin accepts ttl/cmos input levels. the driver input signal that is applied to the t in pin is referenced to logic ground (gnd). it is coupled across the isolation barrier, inverted, and then appears at the transceiver section, referenced to isolated ground (gnd iso ). similarly, the receiver input (r in ) accepts rs-232 signal levels that are referenced to isolated ground. the r in input is inverted and coupled across the isolation barrier to appear at the r out pin, referenced to logic ground. the digital signals are transmitted across the isolation barrier using i coupler technology. chip-scale transformer windings couple the digital signals magnetically from one side of the barrier to the other. digital inputs are encoded into waveforms that are capable of exciting the primary transformer of the winding. at the secondary winding, the induced waveforms are decoded into the binary value that was originally transmitted. there is hysteresis in the v cc input voltage detect circuit. once the dc-to-dc converter is active, the input voltage must be decreased below the turn-on threshold to disable the converter. this feature ensures that the converter does not go into oscillation due to noisy input power. + + c3 0.1f 10v + c1 0.1f 16v + c2 0.1f 16v 0.1f + c4 0.1f 16v eia/tia-232e output eia/tia-232e input v iso v+ c1+ c1? t out r in c2+ c2? v? gnd iso 07388-014 isolation barrier c mos output cmos input 4.5v to 5.5v v cc r out t in gnd 0.1f adm3251e figure 14. typical operating circuit with the dc-to-dc converter enabled (v cc = 4.5 v to 5.5 v) + + c3 0.1f 10v + c1 0.1f 16v + c2 0.1f 16v 0.1f + c4 0.1f 16v eia/tia-232e output eia/tia-232e input v iso v+ c1+ c1? t out r in c2+ c2? v? gnd iso 07388-015 isolation barrier cmos output cmos input 3.0v to 3.7v 3.0 v to 5.5v isolated supply v cc r out t in gnd 0.1f adm3251e figure 15. typical operating circuit with the dc-to-dc converter disabled (v cc = 3.0 v to 3.7 v)
adm3251e rev. e | page 12 of 16 charge pump voltage converter the charge pump voltage converter consists of a 200 khz oscillator and a switching matrix. the converter generates a 10.0 v supply from the input 5.0 v level. this is done in two stages by using a switched capacitor technique as illustrated in figure 16 and figure 17 . first, the 5.0 v input supply is doubled to 10.0 v by using c1 as the charge storage element. the +10.0 v level is then inverted to generate ?10.0 v using c2 as the storage element. c3 is shown connected between v+ and v iso , but is equally effective if connected between v+ and gnd iso . capacitor c3 and capacitor c4 are used to reduce the output ripple. their values are not critical and can be increased, if desired. larger capacitors (up to 10 f) can be used in place of c1, c2, c3, and c4. 5.0 v logic to eia/tia-232e transmitter the transmitter driver converts the 5.0 v logic input levels into rs-232 output levels. when driving an rs-232 load with v cc = 5.0 v, the output voltage swing is typically 10 v. gnd c3 c1 s1 s2 s3 s4 v+ = 2v iso + + internal oscillator v iso v iso 07388-016 figure 16. charge pump voltage doubler gnd iso c4 c2 s1 s2 s3 s4 gnd iso + + internal oscillator v+ v? = ?(v+) from voltage doubler 07388-017 figure 17. charge pump voltage inverter eia/tia-232e to 5 v logic receiver the receiver is an inverting level-shifter that accepts the rs-232 input level and translates it into a 5.0 v logic output level. the input has an internal 5 k pull-down resistor to ground and is also protected against overvoltages of up to 30 v. an uncon- nected input is pulled to 0 v by the internal 5 k pull-down resistor. this, therefore, results in a logic 1 output level for an unconnected input or for an input connected to gnd. the receiver has a schmitt-trigger input with a hysteresis level of 0.1 v. this ensures error-free reception for both a noisy input and for an input with slow transition times. high baud rate the adm3251e offers high slew rates, permitting data trans- mission at rates well in excess of the eia/tia-232e specifications. the rs-232 voltage levels are maintained at data rates up to 460 kbps. thermal analysis each adm3251e device consists of three internal die, attached to a split-paddle lead frame. for the purposes of thermal analysis, it is treated as a thermal unit with the highest junction temper- ature reflected in the ja value from table 7 . the value of ja is based on measurements taken with the part mounted on a jedec standard 4-layer pcb with fine-width traces in still air. follow- ing the recommendations in the pcb layout section decreases the thermal resistance to the pcb, allowing increased thermal margin at high ambient temperatures. insulation lifetime all insulation structures eventually break down when subjected to voltage stress over a sufficiently long period. the rate of insula- tion degradation is dependent on the characteristics of the voltage waveform applied across the insulation. in addition to the testing performed by the regulatory agencies, analog devices carries out an extensive set of evaluations to determine the lifetime of the insulation structure within the adm3251e. the insulation lifetime of the adm3251e depends on the voltage waveform type imposed across the isolation barrier. the i coupler insulation structure degrades at different rates depending on whether the waveform is bipolar ac, unipolar ac, or dc. figure 18 , figure 19 , and figure 20 illustrate these different isolation voltage waveforms. bipolar ac voltage is the most stringent environment. in the case of unipolar ac or dc voltage, the stress on the insulation is significantly lower. 0v rated peak voltage 07388-019 figure 18. bipolar ac waveform 0v rated peak voltage 07388-020 figure 19. unipolar ac waveform 0v rated peak voltage 07388-021 figure 20. dc waveform outline dimensions
adm3251e rev. e | page 13 of 16 applications information example pcb for reduced emi pcb layout the choice of how aggressively emi must be addressed for a design to pass emissions levels depends on the requirements of the design as well as cost and performance trade-offs. the adm3251e requires no external circuitry for its logic interfaces. power supply bypassing is required at the input and output supply pins (see figure 21 ). bypass capacitors are conveniently connected between pin 3 and pin 4 for v cc and between pin 19 and pin 20 for v iso . the capacitor value should be between 0.01 f and 0.1 f. the total lead length between both ends of the capacitor and the input power supply pin should not exceed 20 mm. the starting point for this example is a 2-layer pcb. emi reduc- tions are relative to the emissions and noise from this board. to conform to fcc class b levels, the emissions at these two frequencies must be less than 46 dbv/m, normalized to 3 m antenna distance. as expected, emi testing confirmed that the largest emissions peaks occur at the tank frequency and rectifier frequency. because it is not possible to apply a heat sink to an isolation device, the device primarily depends on heat dissipating into the pcb through the ground pins. if the device is used at high ambient temperatures, care should be taken to provide a thermal path from the ground pins to the pcb ground plane. the board layout in figure 21 shows enlarged pads for pin 4, pin 5, pin 6, pin 7, pin 10, and pin 11. multiple vias should be implemented from each of the pads to the ground plane, which significantly reduce the temperatures inside the chip. the dimensions of the expanded pads are left to the discretion of the designer and the available board space. a 6-layer pcb that employs edge guarding and buried capacitive bypassing, which are emi mitigation techniques described in detail in application note an-0971, was manufactured. the stackup of the 6-layer test pcb is shown in tabl e 9 . pcb layout gerber files are available upon request. table 9. pcb layers layer description top components and ground planes inner layer 1 v cc planes inner layer 2 all tracks inner layer 3 blank inner layer 4 buried capacitive plane bottom ground planes nc v cc v cc gnd v iso v+ c1+ c1? gnd t out gnd r in gnd c2+ r out c2? t in v? gnd gnd iso 07388-018 adm3251e v i a to gnd iso 0.1f c3 c1 c2 0.1f nc = no connect c4 emi testing was repeated on the optimized board. the resulting reduction in radiated emissions is shown in table 10 . this board meets fcc class b standards with no external shielding by utilizing buried stitching capacitors and edge fencing. table 10. emi test results emi test results 300 mhz 600 mhz 2-layer pcb emissions 48 db 53 db 6-layer pcb emissions 36 db 32 db achieved emi reduction 12 db 21 db figure 21. recommended printed circuit board layout in applications involving high common-mode transients, care should be taken to ensure that board coupling across the isolation barrier is minimized. furthermore, the board layout should be designed such that any coupling that does occur equally affects all pins on a given component side. the power supply section of the adm3251e uses a 300 mhz oscillator frequency to pass power through its chip-scale trans- formers. operation at these high frequencies may raise concerns about radiated emissions and conducted noise. pcb layout and construction is a very important tool for controlling radiated emissions. refer to application note an-0971, control of radiated emissions with isopower devices , for extensive guidance on radiation mechanisms and board layout considerations.
adm3251e rev. e | page 14 of 16 isolated power supply circuit to operate the adm3251e with its internal dc-to-dc converter disabled, connect a voltage of between 3.0 v and 3.7 v to the v cc pin and apply an isolated power of between 3.0 v and 5.5 v to the v iso pin, referenced to gnd iso . a transformer driver circuit with a center-tapped transformer and ldo can be used to generate the isolated supply, as shown in figure 22 . the center-tapped transformer provides electrical isolation of the 5 v power supply. the primary winding of the transformer is excited with a pair of square waveforms that are 180 out of phase with each other. a pair of schottky diodes and a smoothing capacitor are used to create a rectified signal from the secondary winding. the adp3330 linear voltage regulator provides a regulated power supply to the bus side circuitry (v iso ) of the adm3251e. adp3330 in nr + + sd103c 22f 10f 5v out sd103c 78253 v cc v cc v cc gnd isol a tion barrier sd err transformer driver v cc gnd v iso gnd iso adm3251e 07388-022 figure 22. isolated power supply circuit
adm3251e rev. e | page 15 of 16 controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-013-ac 13.00 (0.5118) 12.60 (0.4961) outline dimensions 0.30 (0.0118) 0.10 (0.0039) 2.65 (0.1043) 2.35 (0.0925) 10.65 (0.4193) 10.00 (0.3937) 7.60 (0.2992) 7.40 (0.2913) 0 . 7 5 ( 0 . 0 2 9 5 ) 0 . 2 5 ( 0 . 0 0 9 8 ) ? 45 1.27 (0.0500) 0.40 (0.0157) coplanarity 0.10 0.33 (0.0130) 0.20 (0.0079) 0.51 (0.0201) 0.31 (0.0122) seating plane 8 0 20 11 10 1 1.27 (0.0500) bsc 060706-a figure 23. 20-lead standard small outline package [soic_w] wide body (rw-20) dimensions shown in millimeters and (inches) ordering guide model 1 temperature range package description package option adm3251earwz ?40c to +85c 20-lead standard small outline package [soic_w] rw-20 ADM3251EARWZ-REEL ?40c to +85c 20-lead standard small outline package [soic_w] rw-20 eval-adm3251eebz evaluation board 1 z = rohs compliant part.
adm3251e rev. e | page 16 of 16 notes ?2008C2010 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d07388-0-5/10(e)

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